1. Field of the Invention
The present invention relates to undervoltage lockout circuits, and especially relates to an undervoltage lockout circuit for a gate driver that drives a MOSFET (metal oxide semiconductor field effect transistor) or an IGBT (insulated gate bipolar transistor).
2. Description of the Related Art
A gate driver that drives a MOSFET or an IGBT is generally provided with an undervoltage-lockout function (UV function) of blocking off its output when a supply voltage (VCC) decreases lower than a predetermined voltage, in order to prevent loss from increasing in the MOSFET or the IGBT.
An undervoltage lockout circuit having such an undervoltage lockout function is illustrated in FIG. 12, in which a configuration equivalent to, for example, that of Japanese Laid-Open Patent Publication No. 1993-203684 (in FIG. 2) is disclosed. In FIG. 12, numeral 101 denotes a comparator. Numeral 102 denotes a Zener diode, whose cathode is connected to the non-inverting input terminal of the comparator 101, while its anode is connected to ground. Numeral 103 denotes a resistor, and one end thereof is connected to a circuit power supply 104 for supplying a supply voltage (VCC), while the other end is connected to the non-inverting input terminal of the comparator 101. Numeral 105 denotes another resistor, and one end thereof is connected to the circuit power supply 104, while the other end is connected to the inverting input terminal of the comparator 101. Numeral 106 denotes still another resistor, and one end thereof is connected to the inverting input terminal, while the other end is connected to ground. Numeral 107 denotes an output block-off circuit, by which output from the gate driver is blocked off or permitted based on an H/L (high/low) signal outputted from the comparator 101.
FIG. 13 is an explanatory graph illustrating input/output waveforms of the comparator 101 when the supply voltage from the circuit power supply 104 in FIG. 12 decreases. In FIG. 13, (a) represents input voltage waveforms inputted into the comparator 101, while (b) represents an output voltage waveform outputted from the comparator 101. Regarding the input voltage waveforms (a), symbol 111A denotes a supply voltage (VCC) from the circuit supply voltage 104. Symbol 112A denotes a monitor voltage (Vin) inputted into the inverting input terminal of the comparator 101. This monitor voltage 112A is to be equal to a voltage obtained by dividing the supply voltage 111A by the resistors 105 and 106. Symbol 113A denotes a reference voltage (Vref) inputted into the non-inverting input terminal of the comparator 101. Next, regarding the output voltage waveform (b), symbol 114A denotes an H/L signal outputted from the comparator 101 in response to the input voltage waveforms (a). This H/L signal is to be the L signal as the low voltage or the H signal as the high voltage that is outputted corresponding to comparison results between the reference voltage inputted into the non-inverting input terminal and the monitor voltage inputted into the inverting input terminal.
By referring to the input/output waveforms, represented in FIG. 13, of the comparator 101, an operation, when the supply voltage 111A of the circuit power supply 104 decreases, is explained. When the supply voltage 111A decreases, the monitor voltage 112A also decreases accordingly. During the monitor voltage 112A inputted into the comparator 101 being higher than the reference voltage 113A, the L signal is outputted as the H/L signal 114A from the comparator 101. The output block circuit 107 permits output from the gate driver during the L signal being inputted (represented as an output enable region 115A in FIG. 13). When the monitor voltage 112A further decreases to reach the reference voltage 113A, the output from the comparator 101 is inverted; consequently, the H signal is outputted as the H/L signal 114A. The output block circuit 107 blocks output from the gate driver during the H signal being inputted (represented as an output block region 116A).
FIG. 14 is an explanatory graph illustrating input/output waveforms of the comparator 101, when the supply voltage from the circuit power supply 104 gradually increases, for example, at power on. In FIG. 14, the same symbols are given to components that are the same as or equivalent to those represented in FIG. 13. In FIG. 14, (a) represents input voltage waveforms inputted into the comparator 101, while (b) represents an output voltage waveform outputted from the comparator 101. Regarding the input voltage waveforms (a), symbol 111B denotes a supply voltage (VCC) of the circuit power supply 104. Symbol 112B denotes a monitor voltage (Vin) inputted into the inverting input terminal of the comparator 101. Symbol 113B denotes a reference voltage (Vref) inputted into the non-inverting input terminal of the comparator 101. Next, regarding the output voltage waveform (b), symbol 114B denotes an H/L signal outputted from the comparator 101 in response to the input voltage waveforms (a). This H/L signal is to be the L signal as the low voltage or the H signal as the high voltage that are outputted corresponding to comparison results between the reference voltage inputted into the non-inverting input terminal and the monitor voltage inputted into the inverting input terminal.
By referring to the input/output waveforms, represented in FIG. 14, of the comparator 101, an operation when the supply voltage 111B of the circuit power supply 104 gradually increases is explained. When the supply voltage 111B gradually increases, the monitor voltage 112B also increases with a voltage obtained by dividing the supply voltage 111B by the resistors 105 and 106. During the monitor voltage 112B inputted into the comparator 101 being lower than the reference voltage 113B, the H signal is outputted as the HL signal 114B from the comparator 101. The output block circuit 107 blocks output from the gate driver during the H signal being inputted (represented as an output block region 116B in FIG. 14). The monitor voltage 112B further increases, and when the value reaches the reference voltage 113B, the output from the comparator 101 is inverted; consequently, the L signal is outputted as the H/L signal 114B. The output block circuit 107 permits output from the gate driver during the L signal being inputted (represented as an output enable region 115B in FIG. 14).
In the conventional undervoltage lockout circuit, the output block and the output permission from the gate driver are performed according to the above operation.
However, for example, at power on, a case may occur in which the supply voltage steeply increases at a rate of several-ten V/μsec, for example, approximately 50 V/μsec. In such a case where the supply voltage steeply increases, the following problems may occur in the above conventional undervoltage lockout circuit.
FIG. 15 is an explanatory graph illustrating input/output waveforms of the comparator 101, when the supply voltage from the circuit power supply 104 steeply increases. In FIG. 15, the same symbols are given to components that are the same as or equivalent to those represented in FIG. 13 and FIG. 14. In FIG. 15, (a) represents input voltage waveforms inputted into the comparator 101, while (b) represents an output voltage waveform outputted from the comparator 101. Regarding the input voltage waveforms (a), symbol 111C denotes a supply voltage (VCC) of the circuit power supply 104. Symbol 112C denotes a monitor voltage (Vin) inputted into the inverting input terminal of the comparator 101. Symbol 113C denotes a reference voltage (Vref) inputted into the non-inverting input terminal of the comparator 101. Next, regarding the output voltage waveform (b), symbol 114C denotes an H/L signal outputted from the comparator 101 in response to the input voltage waveforms (a). This H/L signal is to be the L signal as the low voltage (represented as an output enable region 115C in FIG. 15) or the H signal as the high voltage (represented as an output block region 116C) that are outputted corresponding to comparison results between the reference voltage inputted into the non-inverting input terminal and the monitor voltage inputted into the inverting input terminal.
By referring to the input/output waveforms of the comparator 101 illustrated in FIG. 15, an operation when the supply voltage 111C of the circuit power supply 104 steeply increases is explained. In response to the steep increase of the supply voltage 111C, the monitor voltage 112C that is a voltage obtained by dividing the supply voltage 111C by the resistor 105 and the resistor 106 follows this steep increase. However, because a certain time is required for charging the pn-junction capacitance of the Zener diode 102, the reference voltage 113C cannot follow this steep increase. Therefore, during a short period just after the supply voltage 111C has started to increase, specifically within several μsec, a region in which the monitor voltage 112C exceeds the reference voltage 113C is generated (represented as an output-block impossible region 117C in FIG. 15). In this output-unblocked region 117C, as represented in FIG. 14, the H signal is outputted from the comparator 101, and the output block circuit 107 has to block the output from the gate driver; however, because the L signal is actually outputted from the comparator 101, the output block circuit 107 permits the output from the gate driver. Accordingly, a problem occurs in which the output from the gate driver cannot be normally blocked. As a result, the gate driver cannot be normally operated.